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PDF ADM1075 Data sheet ( Hoja de datos )
| Número de pieza | ADM1075 | |
| Descripción | -48V Hot Swap Controller and Digital Power Monitor | |
| Fabricantes | Analog Devices | |
| Logotipo |  |
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Data Sheet
−48 V Hot Swap Controller and Digital
Power Monitor with PMBus Interface
ADM1075
FEATURES
Constant power foldback for FET SOA protection
Precision (<1.0%) current and voltage measurement
Controls inrush and faults for negative supply voltages
Suitable for wide input range due to internal shunt regulator
25 mV/50 mV full-scale sense voltage
Fine tune current limit to allow use of standard sense resistor
Soft start inrush current limit profiling
1% accurate UVH and OV pins, 1.5% accurate UVL pin
PMBus/I2C interface for control, telemetry, and fault
recording
28-lead LFCSP and TSSOP
−40°C to 105°C junction temperature (TJ) operating range
APPLICATIONS
Telecommunication and data communication equipment
Central office switching
−48 V distributed power systems
Negative power supply control
High availability servers
PRODUCT HIGHLIGHTS
1. Constant Power Foldback.
Maximum FET power set by a PLIM resistor divider. This
eases complexity when designing to maintain FET SOA.
2. Adjustable Current Limit.
The current limit is adjustable via the ISET pin allowing for
the use of a standard value sense resistor.
3. 12-Bit ADC.
Accurate voltage, current, and power measurements. Also
enables calculation of energy consumption over time.
4. PMBus/I2C Interface.
PMBus fast mode compliant interface used to read back
status and data registers and set warning and fault limits.
5. Fault Recording.
Latched status registers provide useful debugging infor-
mation to help trace faults in high reliability systems.
6. Built-In Soft Start.
Soft start capacitor controls inrush current profile with
di/dt control.
FUNCTIONAL BLOCK DIAGRAM
–48V RTN (0V)
RDROP
VIN
SPLYGD
VEE
UVH
UVL
OV
VCC AND
REFERENCE
GENERATOR
UNDERVOLTAGE
AND
OVERVOLTAGE
DETECTOR
POWER
ACCUMULATOR
POWER
MULTIPLIER
12-BIT ADC
ADC_V
VCAP
ISET
FET POWER
FOLDBACK
CONTROL
FAULT TIMER
GATE CONTROL
CURRENT LIMIT
SHDN RESTART
DIGITAL
AND
PMBUS
LATCH
GPO1/ALERT1/CONV
GPO2/ALERT2
SDAO
SDAI
SCL
ADR
ADC_AUX
DC-TO-DC
CLOAD CONVERTER
12V
5V
3.3V
2.8V
...etc.
GND
PWRGD
DRAIN
PLIM
VEE
GATE
SENSE+
SENSE–
N-FET
ADuM1250
SDA_ISO
SCL_ISO
RSENSE
TIMER SS
VEE_G
VEE
–48V
Figure 1.
Rev. C
Document Feedback
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700 ©2011–2014 Analog Devices, Inc. All rights reserved.
Technical Support
www.analog.com
1 page  
ADM1075
GENERAL DESCRIPTION
The ADM1075 is a full feature, negative voltage, hot swap control-
ler with constant power foldback and high accuracy digital current
and voltage measurement that allows boards to be safely inserted
and removed from a live −48 V backplane. The part provides
precise and robust current limiting and protection against both
transient and nontransient short circuits and overvoltage and
undervoltage conditions. The ADM1075 typically operates from
a negative voltage of −35 V to −80 V and, due to shunt regulation,
has excellent voltage transient immunity. The operating range of
the part is flexible due to the shunt regulator, and the part can be
powered directly by a 10 V rail to save shunt power dissipation
(see the Powering the ADM1075 section for more details).
A full-scale current limit of 25 mV or 50 mV can be selected by
choosing the appropriate model. The maximum current limit is
set by the combination of the sense resistor, RSENSE, and the input
voltage on the ISET pin, using external resistors. This allows fine
tuning of the trip voltage so that standard sense resistors can be
used. Inrush current is limited to this programmable value by
controlling the gate drive of an external N-channel FET. A built-
in soft start function allows control of the inrush current profile by
an external capacitor on the soft start (SS) pin.
An external capacitor on the TIMER pin determines the maxi-
mum allowed on-time for when the system is in current limit.
This is based on the safe operating area (SOA) limits of the
MOSFET. A constant power foldback scheme is used to control
the power dissipation in the MOSFET during power-up and
fault conditions. The ADM1075 regulates the current dynami-
cally to ensure that the power in the MOSFET is within SOA
limits as VDS changes. After the timer has expired, the device
shuts down the MOSFET. The level of this power, along with
the TIMER regulation time, can be set to ensure that the
MOSFET remains within the SOA limits.
The ADM1075 employs a limited consecutive retry scheme
when the LATCH pin is tied to the SHDN pin. In this mode,
if the load current reaches the limit, the FET gate is pulled low
after the timer expires and retries after a cooling period for
seven attempts only. If the fault remains, the device latches off,
and the MOSFET is disabled until a manual restart is initiated.
Alternatively, the ADM1075 can be set to retry only once by
isolating the LATCH pin from the SHDN pin. The part can
also be configured to retry an infinite number of times with a
10 second interval between restarts by connecting the GPO2
pin to the RESTART pin.
Data Sheet
The ADM1075 has separate UVx and OV pins for undervoltage
and overvoltage detection. The FET is turned off if a nontransient
voltage less than the undervoltage threshold (typically −35 V) is
detected on the UVx pins or if greater than the overvoltage
threshold (typically −80 V) is detected on the OV pin. The
operating voltage range of the ADM1075 is programmable via
resistor networks on the UVx and OV pins. The hysteresis levels
on the overvoltage detectors can also be altered by selecting the
appropriate resistors. There are two separate UVx pins to allow
accurate programming of hysteresis.
In the case of a short circuit, the ADM1075 has a fast response
circuit to detect and respond adequately to this event. If the
sense voltage exceeds 1.5 times the normal current limit, a high
current (750 mA minimum) gate pull-down switch is activated
to shut down the MOSFET as quickly as possible. There is a
default internal glitch filter of 900 ns. If a longer filter time or
different severe overcurrent limit is required, these parameters
can be adjusted via the PMBus™ interface.
The ADM1075 also includes a 12-bit ADC to provide digital
measurement of the voltage and load current. The current is
measured at the output of the internal current sense amplifier
and the voltage from the ADC_V input. This data can be read
across the PMBus interface.
The PMBus interface allows a controller to read current, voltage,
and power measurements from the ADC. Measurements can be
initiated by a PMBus command or can be set up to run continu-
ously. The user can read the latest conversion data whenever it
is required. A power accumulator is also provided to report
total power consumed in a user specified period (total energy).
Up to four unique I2C addresses can be created, depending on
the configuration of the ADR pin.
The GPO1/ALERT1/CONV and GPO2/ALERT2 outputs can
be used as a flag to warn a microcontroller or FPGA of one or
more fault/warning conditions becoming active. The fault type
and level is programmed across the PMBus, and the user can
select which faults/warnings activate the alert.
Other functions include
• PWRGD output, which can be used to enable a power
module (the DRAIN and GATE pins are monitored to
determine when the load capacitance is fully charged)
• SHDN input to manually disable the GATE drive
• RESTART input to remotely initiate a 10 second shutdown
Rev. C | Page 4 of 52
5 Page 
ADM1075
ABSOLUTE MAXIMUM RATINGS
Table 3.
Parameter
VIN Pin to VEE
UVL Pin to VEE
UVH Pin to VEE
OV Pin to VEE
ADC_V Pin to VEE
ADC_AUX Pin to VEE
SS Pin to VEE
TIMER Pin to VEE
VCAP Pin to VEE
ISET Pin to VEE
SPLYGD Pin to VEE
LATCH Pin to VEE
RESTART Pin to VEE
SHDN Pin to VEE
PWRGD Pin to VEE
DRAIN Pin to VEE
SCL Pin to VEE
SDAI Pin to VEE
SDAO Pin to VEE
ADR Pin to VEE
GPO1/ALERT1/CONV Pin to VEE
GPO2/ALERT2 Pin to VEE
PLIM Pin to VEE
GATE Pin to VEE
SENSE+ Pin to VEE
SENSE− Pin to VEE
VEE to VEE_G
Continuous Current into Any Pin
Storage Temperature Range
Operating Junction Temperature
Range
Lead Temperature, Soldering (10 sec)
Junction Temperature
Rating
−0.3 V to +14 V
−0.3 V to +4 V
−0.3 V to +4 V
−0.3 V to +4 V
−0.3 V to +4 V
−0.3 V to +4 V
−0.3 V to (VCAP + 0.3 V)
−0.3 V to (VCAP + 0.3 V)
−0.3 V to +4 V
−0.3 V to +4 V
−0.3 V to +18 V
−0.3 V to +18 V
−0.3 V to +18 V
−0.3 V to +18 V
−0.3 V to +18 V
−0.3 V to (VCAP + 0.3 V)
−0.3 V to +6.5 V
−0.3 V to +6.5 V
−0.3 V to +6.5 V
−0.3 V to (VCAP + 0.3 V)
−0.3 V to +18 V
−0.3 V to +18 V
−0.3 V to +4 V
−0.3 V to +18 V
−0.3 V to +4 V
−0.3 V to +0.3 V
−0.3 V to +0.3 V
±10 mA
−65°C to +125°C
−40°C to +105°C
300°C
150°C
Data Sheet
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
THERMAL RESISTANCE
θJA is specified for the worst-case conditions, that is, a device
soldered in a circuit board for surface-mount packages.
Table 4. Thermal Resistance
Package Type
28-Lead TSSOP
28-Lead LFCSP
θJA1
68
35
θJC
20
4
Unit
°C/W
°C/W
1 Measured on JEDEC 4-layer board in still air.
ESD CAUTION
Rev. C | Page 10 of 52
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet ADM1075.PDF ] | |
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