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Número de pieza | VSC8115 | |
Descripción | STS-12/STS-3 Multi Rate Clock and Data Recovery Unit | |
Fabricantes | Vitesse Semiconductor | |
Logotipo | ||
Hay una vista previa y un enlace de descarga de VSC8115 (archivo pdf) en la parte inferior de esta página. Total 12 Páginas | ||
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SEMICONDUCTOR CORPORATION
Target Specification
VSC8115
STS-12/STS-3 Multi Rate
Clock and Data Recovery Unit
Features
• Performs clock and data recovery for
622.08Mb/s (STS-12/OC-12/STM-4) or
155.52Mb/s (STS-3/OC-3/STM-1) NRZ data
• Meets Bellcore, ITU and ANSI Specifications
for Jitter Performance
• 19.44MHz reference frequency LVTTL Input
• Lock Detect output pin monitors data run length
and frequency drift from the reference clock
• Data is Retimed at the Output
• Active High Signal Detect LVPECL Input
• Low-jitter high speed outputs can be configured
as either LVPECL or low power LVDS
• Low power - 0.188 Watts Typical Power
• +3.3V Power Supply
• 20 Pin TSSOP Package
• Requires One External Capacitor
• PLL bypass operation facilitates the board
debug process
General Description
The VSC8115 functions as a clock and data recovery unit for SONET/SDH-based equipment to derive high
speed timing signals. The VSC8115 recovers the clock from the scrambled NRZ data operating at 622.08Mb/s
(STS-12/OC-12/STM-4) or 155.52Mb/s (STS-3/OC-3/STM-1). After the clock is recovered, the data is retimed
using an output flip-flop. Both recovered clock and retimed data outputs can be configured as LVDS or
LVPECL signals to facilitate a low-jitter and low power interface.
VSC8115 Block Diagram
STS12
BYPASS
DATAIN+/- 2
SD
LOCKREFN
REFCLK
Divider
CAP+ CAP-
Phase/
Freq
Detector
Loop Filter
VCO
0
1
LOCKDET
2
DATAOUT+/-
2
CLKOUT+/-±
G52272-0, Rev. 1.1
9/29/00
© VITESSE SEMICONDUCTOR CORPORATION
741 Calle Plano, Camarillo, CA 93012 • 805/388-3700 • FAX: 805/987-5896
Page 1
1 page Target Specification
VSC8115
VITESSE
SEMICONDUCTOR CORPORATION
STS-12/STS-3 Multi Rate
Clock and Data Recovery Unit
Jitter Tolerance
Jitter Tolerance is the ability of the Clock and Data Recovery Unit to track timing variation in the received
data stream. The Bellcore and ITU specifications allow the received optical data to contain jitter. The amount
that must be tolerated is a function of the frequency of the jitter. At high frequencies the specifications do not
require the VSC8115 to tolerate large amounts, whereas at low frequencies many unit intervals (bit times) of jit-
ter have to be tolerated. Jitter tolerance is defined as the ratio of jitter on the output OC-N/STS-N signal to the
jitter applied on the input OC-N/STSN signal versus frequency. The VSC8115 is designed to tolerate this jitter
with margin over the specification limits, see Figure 2. The VSC8115 obtains and maintains lock based on the
data transition information. When there is no transition on the data stream, the recovered clock frequency will
be held to within +500ppm of the reference clock. The VSC8115 can maintain lock over 1000 bits of no switch-
ing on data stream.
Figure 2: Input Jitter Tolerance Specification
JITTER(UI P-P)
150 Bellcore Requirement
15
1.5
0.15
VSC8115 Typical
24 Jitter Tolerance
2.4
0.6
10 30 300 25K 250K 1M 2.5M JITTER FREQ(HZ)
Jitter Generation
Jitter generation is defined as the jitter of the serial clock and serial data outputs while rms jitter is presented
to the serial data inputs. Maximum jitter generation is 0.01 U.I. when rms jitter of less than 14ps (OC-12) or
56ps (OC-3) is presented to the serial data inputs.
G52272-0, Rev. 1.1
9/29/00
© VITESSE SEMICONDUCTOR CORPORATION
741 Calle Plano, Camarillo, CA 93012 • 805/388-3700 • FAX: 805/987-5896
Page 5
5 Page VITESSE
SEMICONDUCTOR CORPORATION
Target Specification
VSC8115
STS-12/STS-3 Multi Rate
Clock and Data Recovery Unit
Package Information
TSSOP Package Drawings
Key Min
Nom
Max
A−
A1 0.05
A2 0.85
aaa
b 0.19
b1 0.19
bbb
c 0.09
c1 0.09
−
−
0.90
0.076
−
0.22
0.10
−
0.127
1.10
0.15
0.95
0.30
0.25
0.20
0.16
E1 4.30 4.40 4.50
e 0.65 BSC
E 6.40 BSC
L 0.50 0.60 0.70
θ 0° − 8°
G52272-0, Rev. 1.1
9/29/00
© VITESSE SEMICONDUCTOR CORPORATION
741 Calle Plano, Camarillo, CA 93012 • 805/388-3700 • FAX: 805/987-5896
Page 11
11 Page |
Páginas | Total 12 Páginas | |
PDF Descargar | [ Datasheet VSC8115.PDF ] |
Número de pieza | Descripción | Fabricantes |
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VSC8116 | ATM/SONET/SDH 622/155Mb/s Transceiver Mux/Demux | Vitesse Semiconductor Corporation |
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