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ADV7123 の電気的特性と機能

ADV7123のメーカーはAnalog Devicesです、この部品の機能は「Triple 10-Bit High Speed Video DAC」です。


製品の詳細 ( Datasheet PDF )

部品番号 ADV7123
部品説明 Triple 10-Bit High Speed Video DAC
メーカ Analog Devices
ロゴ Analog Devices ロゴ 




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ADV7123 Datasheet, ADV7123 PDF,ピン配置, 機能
CMOS, 330 MHz
Triple 10-Bit High Speed Video DAC
ADV7123
FEATURES
330 MSPS throughput rate
Triple 10-bit digital-to-analog converters (DACs)
SFDR
−70 dB at fCLK = 50 MHz; fOUT = 1 MHz
−53 dB at fCLK = 140 MHz; fOUT = 40 MHz
RS-343A-/RS-170-compatible output
Complementary outputs
DAC output current range: 2.0 mA to 26.5 mA
TTL-compatible inputs
Internal reference (1.235 V)
Single-supply 5 V/3.3 V operation
48-lead LQFP package
Low power dissipation (30 mW minimum @ 3 V)
Low power standby mode (6 mW typical @ 3 V)
Industrial temperature range (−40°C to +85°C)
Pb-free (lead-free) package
APPLICATIONS
Digital video systems (1600 × 1200 @ 100 Hz)
High resolution color graphics
Digital radio modulation
Image processing
Instrumentation
Video signal reconstruction
GENERAL DESCRIPTION
The ADV7123 (ADV®) is a triple high speed, digital-to-analog
converter on a single monolithic chip. It consists of three high
speed, 10-bit, video DACs with complementary outputs, a
standard TTL input interface, and a high impedance, analog
output current source.
The ADV7123 has three separate 10-bit-wide input ports. A
single 5 V/3.3 V power supply and clock are all that are required
to make the part functional. The ADV7123 has additional video
control signals, composite SYNC and BLANK.
The ADV7123 also has a power save mode.
FUNCTIONAL BLOCK DIAGRAM
VAA
BLANK
SYNC
BLANK AND
SYNC LOGIC
R9 TO R0 10
DATA
REGISTER
10
DAC
G9 TO G0 10
DATA
REGISTER
10
DAC
B9 TO B0 10
DATA
REGISTER
10
DAC
PSAVE
CLOCK
POWER-DOWN
MODE
VOLTAGE
REFERENCE
CIRCUIT
ADV7123
GND
RSET COMP
Figure 1.
IOR
IOR
IOG
IOG
IOB
IOB
VREF
The ADV7123 is fabricated in a 5 V CMOS process. Its
monolithic CMOS construction ensures greater functionality
with lower power dissipation. The ADV7123 is available in a
48-lead LQFP package.
PRODUCT HIGHLIGHTS
1. 330 MSPS throughput.
2. Guaranteed monotonic to 10 bits.
3. Compatible with a wide variety of high resolution color
graphics systems, including RS-343A and RS-170.
ADV is a registered trademark of Analog Devices, Inc.
Rev. D
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113
©2010 Analog Devices, Inc. All rights reserved.

1 Page





ADV7123 pdf, ピン配列
ADV7123
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications....................................................................................... 1
Functional Block Diagram .............................................................. 1
General Description ......................................................................... 1
Product Highlights ........................................................................... 1
Revision History ............................................................................... 2
Specifications..................................................................................... 3
5 V Specifications ......................................................................... 3
3.3 V Specifications ...................................................................... 4
5 V Dynamic Specifications ........................................................ 5
3.3 V Dynamic Specifications..................................................... 6
5 V Timing Specifications ........................................................... 7
3.3 V Timing Specifications ........................................................ 8
Absolute Maximum Ratings............................................................ 9
ESD Caution.................................................................................. 9
Pin Configuration and Function Descriptions........................... 10
Typical Performance Characteristics ........................................... 12
5 V Typical Performance Characteristics ................................ 12
REVISION HISTORY
7/10—Rev. C to Rev. D
Changes to Figure 2.......................................................................... 9
Changes to Figure 22 and Figure 23............................................. 17
Changes to Table 9.......................................................................... 18
3/09—Rev. B to Rev. C
Updated Format..................................................................Universal
Changes to Features Section............................................................ 1
Changes to Table 5............................................................................ 7
Changes to Table 6............................................................................ 8
Changes to Table 8.......................................................................... 10
Changed fCLOCK to fCLK..................................................................... 12
Changes to Figure 6, Figure 7, and Figure 8................................ 12
Changes to Figure 13 and Figure 17............................................. 14
Deleted Ground Planes Section, Power Planes Section, and
Supply Decoupling Section ........................................................... 15
Changes to Figure 23...................................................................... 17
Changes to Table 9, Analog Outputs Section, Figure 24, and
Figure 25 .......................................................................................... 18
Changes to Video Output Buffers Section and PCB Layout
Considerations Section .................................................................. 19
Changes to Analog Signal Interconnect Section and
Figure 28 .......................................................................................... 20
Updated Outline Dimensions ....................................................... 21
Changes to Ordering Guide .......................................................... 21
3 V Typical Performance Characteristics................................ 14
Terminology .................................................................................... 16
Circuit Description and Operation.............................................. 17
Digital Inputs .............................................................................. 17
Clock Input.................................................................................. 17
Video Synchronization and Control........................................ 18
Reference Input........................................................................... 18
DACs ............................................................................................ 18
Analog Outputs .......................................................................... 18
Gray Scale Operation................................................................. 19
Video Output Buffers................................................................. 19
PCB Layout Considerations...................................................... 19
Digital Signal Interconnect ....................................................... 19
Analog Signal Interconnect....................................................... 20
Outline Dimensions ....................................................................... 21
Ordering Guide .......................................................................... 21
10/02—Rev. A to Rev. B
Change in Title...................................................................................1
Change to Feature..............................................................................1
Change to Product Highlights .........................................................1
Change Specifications .......................................................................3
Change to Pin Function Descriptions ......................................... 10
Change to Reference Input section .............................................. 18
Change to Figure 28 ....................................................................... 22
Updated Outline Dimensions....................................................... 23
Change to Ordering Guide............................................................ 23
Rev. D | Page 2 of 24


3Pages


ADV7123 電子部品, 半導体
ADV7123
5 V DYNAMIC SPECIFICATIONS
VAA = 5 V ± 5%,1 VREF = 1.235 V, RSET = 560 Ω, CL = 10 pF. All specifications are TA = 25°C, unless otherwise noted, TJ MAX = 110°C.
Table 3.
Parameter1
AC LINEARITY
Spurious-Free Dynamic Range to Nyquist2
Single-Ended Output
fCLK = 50 MHz; fOUT = 1.00 MHz
fCLK = 50 MHz; fOUT = 2.51 MHz
fCLK = 50 MHz; fOUT = 5.04 MHz
fCLK = 50 MHz; fOUT = 20.2 MHz
fCLK = 100 MHz; fOUT = 2.51 MHz
fCLK = 100 MHz; fOUT = 5.04 MHz
fCLK = 100 MHz; fOUT = 20.2 MHz
fCLK = 100 MHz; fOUT = 40.4 MHz
fCLK = 140 MHz; fOUT = 2.51 MHz
fCLK = 140 MHz; fOUT = 5.04 MHz
fCLK = 140 MHz; fOUT = 20.2 MHz
fCLK = 140 MHz; fOUT = 40.4 MHz
Double-Ended Output
fCLK = 50 MHz; fOUT = 1.00 MHz
fCLK = 50 MHz; fOUT = 2.51 MHz
fCLK = 50 MHz; fOUT = 5.04 MHz
fCLK = 50 MHz; fOUT = 20.2 MHz
fCLK = 100 MHz; fOUT = 2.51 MHz
fCLK = 100 MHz; fOUT = 5.04 MHz
fCLK = 100 MHz; fOUT = 20.2 MHz
fCLK = 100 MHz; fOUT = 40.4 MHz
fCLK = 140 MHz; fOUT = 2.51 MHz
fCLK = 140 MHz; fOUT = 5.04 MHz
fCLK = 140 MHz; fOUT = 20.2 MHz
fCLK = 140 MHz; fOUT = 40.4 MHz
Spurious-Free Dynamic Range Within a Window
Single-Ended Output
fCLK = 50 MHz; fOUT = 1.00 MHz; 1 MHz Span
fCLK = 50 MHz; fOUT = 5.04 MHz; 2 MHz Span
fCLK = 140 MHz; fOUT = 5.04 MHz; 4 MHz Span
Double-Ended Output
fCLK = 50 MHz; fOUT = 1.00 MHz; 1 MHz Span
fCLK = 50 MHz; fOUT = 5.00 MHz; 2 MHz Span
fCLK = 140 MHz; fOUT = 5.00 MHz; 4 MHz Span
Total Harmonic Distortion
fCLK = 50 MHz; fOUT = 1.00 MHz
TA = 25°C
TMIN to TMAX
fCLK = 50 MHz; fOUT = 2.00 MHz
fCLK = 100 MHz; fOUT = 2.00 MHz
fCLK = 140 MHz; fOUT = 2.00 MHz
Min Typ Max Unit
67 dBc
67 dBc
63 dBc
55 dBc
62 dBc
60 dBc
54 dBc
48 dBc
57 dBc
58 dBc
52 dBc
41 dBc
70 dBc
70 dBc
65 dBc
54 dBc
67 dBc
63 dBc
58 dBc
52 dBc
62 dBc
61 dBc
55 dBc
53 dBc
77 dBc
73 dBc
64 dBc
74 dBc
73 dBc
60 dBc
66 dBc
65 dBc
64 dBc
63 dBc
55 dBc
Rev. D | Page 5 of 24

6 Page



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