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MC33065-H の電気的特性と機能

MC33065-HのメーカーはMotorola Semiconductorsです、この部品の機能は「High Performance Dual Channel Current Mode Controllers」です。


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部品番号 MC33065-H
部品説明 High Performance Dual Channel Current Mode Controllers
メーカ Motorola Semiconductors
ロゴ Motorola Semiconductors ロゴ 




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MC33065-H Datasheet, MC33065-H PDF,ピン配置, 機能
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Order this document by MC34065–H/D
MC34065-H, L
High Performance
MC33065-H, L
Dual Channel Current
Mode Controllers
The MC34065–H,L series are high performance, fixed frequency, dual
current mode controllers. They are specifically designed for off–line and
dc–to–dc converter applications offering the designer a cost effective
solution with minimal external components. These integrated circuits feature
a unique oscillator for precise duty cycle limit and frequency control, a
temperature compensated reference, two high gain error amplifiers, two
current sensing comparators, Drive Output 2 Enable pin, and two high
current totem pole outputs ideally suited for driving power MOSFETs.
Also included are protective features consisting of input and reference
undervoltage lockouts each with hysteresis, cycle–by–cycle current limiting,
and a latch for single pulse metering of each output. These devices are
available in dual–in–line and surface mount packages.
The MC34065–H has UVLO thresholds of 14 V (on) and 10 V (off), ideally
suited for off–line converters. The MC34065–L is tailored for lower voltage
applications having UVLO thresholds of 8.4 V (on) and 7.8 V (off).
Unique Oscillator for Precise Duty Cycle Limit and Frequency Control
Current Mode Operation to 500 kHz
Automatic Feed Forward Compensation
Separate Latching PWMs for Cycle–By–Cycle Current Limiting
Internally Trimmed Reference with Undervoltage Lockout
Drive Output 2 Enable Pin
Two High Current Totem Pole Outputs
Input Undervoltage Lockout with Hysteresis
Low Startup and Operating Current
Vref
15
1
Sync Input
3
RT
CT
2
Voltage
Feedback 1
4
Compensation 1
5
Drive Output
2
Enable
14
Voltage
Feedback 2 13
Compensation 2
12
Representative Block Diagram
VCC 16
5.0V VCC
Reference
Undervoltage
R Lockout
R
Vref
Undervoltage
Lockout
Oscillator
+
Error
Amp 1
Latching
PWM 1
Drive Output 1
7
Current Sense 1
6
+
Error
Amp 2
Gnd 8
Latching
PWM 2
Drive Gnd 9
Drive Output 2
10
Current Sense 2
11
HIGH PERFORMANCE
DUAL CHANNEL CURRENT
MODE CONTROLLERS
SEMICONDUCTOR
TECHNICAL DATA
P SUFFIX
PLASTIC PACKAGE
CASE 648
DW SUFFIX
PLASTIC PACKAGE
CASE 751G
(SO–16L)
PIN CONNECTIONS
Sync Input 1
CT 2
RT 3
Voltage Feedback 1 4
Compensation 1 5
Current Sense 1 6
Drive Output 1 7
Gnd 8
16 VCC
15 Vref
14 Drive Output 2 Enable
13 Voltage Feedback 2
12 Compensation 2
11 Current Sense 2
10 Drive Output 2
9 Drive Gnd
(Top View)
ORDERING INFORMATION
Device
Operating
Temperature Range Package
MC34065DW–H
MC34065DW–L
MC34065P–H
TA = 0° to +70°C
SO–16L
Plastic DIP
MC34065P–L
MC33065DW–H
MC33065DW–L
MC33065P–H
MC33065P–L
TA = –40° to +85°C
SO–16L
Plastic DIP
MOTOROLA ANALOG IC DEVICE DATA
© Motorola, Inc. 1996
Rev 0
1

1 Page





MC33065-H pdf, ピン配列
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MC34065–H, L MC33065–H, L
ELECTRICAL CHARACTERISTICS (VCC = 15 V [Note 2], RT = 8.2 k, CT = 3.3 nF, for typical values TA = 25°C, for min/max values
TA is the operating ambient temperature range that applies to [Note 3].)
Characteristics
Symbol Min Typ Max Unit
CURRENT SENSE SECTION
Current Sense Input Voltage Gain (Notes 4 and 5)
Maximum Current Sense Input Threshold (Note 4)
Input Bias Current
Propagation Delay (Current Sense Input to Output)
DRIVE OUTPUT 2 ENABLE PIN
Enable Pin Voltage – High State (Output 2 Enabled)
Enable Pin Voltage – Low State (Output 2 Disabled)
Low State Input Current (VIL = 0 V)
DRIVE OUTPUTS
Output Voltage – Low State (Isink = 20 mA)
Output Voltage – Low State (Isink = 200 mA)
Output Voltage – High State (Isource = 20 mA)
Output Voltage – High State (Isource = 200 mA)
Output Voltage with UVLO Activated (VCC = 6.0 V, ISink = 1.0 mA)
Output Voltage Rise Time (CL = 1.0 nF)
Output Voltage Fall Time (CL = 1.0 nF)
UNDERVOLTAGE LOCKOUT SECTION
Startup Threshold (VCC Increasing)
–L Suffix
–H Suffix
AV
Vth
IIB
tPLN(In/Out)
2.75
0.9
VIH 3.5
VIL 0
IIB 100
VOL
VOH
VOL(UVLO)
tr
tf
1.6
12.8
10
Vth
7.8
13
3.0
1.0
– 2.0
150
250
0.3
2.4
13.3
11.2
0.1
50
50
8.4
14
3.25
1.1
– 10
300
Vref
1.5
400
0.5
3.0
12.3
1.1
150
150
9.0
15
V/V
V
µA
ns
V
µA
V
V
ns
ns
V
Minimum Operating Voltage After Turn–On (VCC Decreasing)
–L Suffix
–H Suffix
VCC(min)
7.2 7.8 8.4
9.0 10 11
V
TOTAL DEVICE
Power Supply Current
Startup
–L Suffix (VCC = 6.0 V)
–H Suffix (VCC = 12 V)
Operating (Note 2)
ICC mA
– 0.4 0.8
– 0.6 1.0
– 20 25
NOTES: 1. Maximum package power dissipation limits must be observed.
NOTES: 2. Adjust VCC above the startup threshold before setting to 15 V.
NOTES: 3. Low duty cycle pulse techniques are used during test to maintain junction
NOTES: 3. temperature as close to ambient as possible:
4. This parameter is measured at the latch trip point with VFB = 0 V
V Compensation
5. Comparator gain is defined as AV = V Current Sense
Tlow = 0°C for the MC34065
Tlow = –40°C for the MC33065
Thigh = +70°C for MC34065
Thigh = +85°C for MC33065
16
14 3.3 nF
12
Figure 1. Timing Resistor versus
Oscillator Frequency
500 pF
1.0 nF
100 pF
220 pF
10
5.0 nF
330 pF
8.0 2.2 nF
CT =
6.0 10 nF
VCC = 15 V
4.0 TA = 25°C
10 k 30 k 50 k 100 k
300 k 500 k 1.0 M
fOSC, OSCILLATOR FREQUENCY (Hz)
Figure 2. Maximum Output Duty Cycle
versus Oscillator Frequency
50
48
46 Output 2
44
42 VCC = 15 V
RT = 4.0 k to 16 k
40
TA = 25°
CL = 15 pF
Output 1
38
10 k
30 k 50 k 100 k
300 k 500 k 1.0 M
fOSC, OSCILLATOR FREQUENCY (Hz)
MOTOROLA ANALOG IC DEVICE DATA
3


3Pages


MC33065-H 電子部品, 半導体
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MC34065–H, L MC33065–H, L
OPERATING DESCRIPTION
The MC34065–H,L series are high performance, fixed
frequency, dual channel current mode controllers specifically
designed for Off–Line and dc–to–dc converter applications.
These devices offer the designer a cost effective solution with
minimal external components where independent regulation
of two power converters is required. The Representative
Block Diagram is shown in Figure 15. Each channel contains
a high gain error amplifier, current sensing comparator, pulse
width modulator latch, and totem pole output driver. The
oscillator, reference regulator, and undervoltage lock–out
circuits are common to both channels.
Oscillator
The unique oscillator configuration employed features
precise frequency and duty cycle control. The frequency is
programmed by the values selected for the timing
components RT and CT. Capacitor CT is charged and
discharged by an equal magnitude internal current source
and sink, generating a symmetrical 50 percent duty cycle
waveform at Pin 2. The oscillator peak and valley thresholds
are 3.5 V and 1.6 V respectively. The source/sink current
magnitude is controlled by resistor RT. For proper operation
over temperature it must be in the range of 4.0 kto 16 kas
shown in Figure 1.
As CT charges and discharges, an internal blanking pulse
is generated that alternately drives the center inputs of the
upper and lower NOR gates high. This, in conjunction with a
precise amount of delay time introduced into each channel,
produces well defined non–overlapping output duty cycles.
Output 2 is enabled while CT is charging, and Output 1 is
enabled during the discharge. Figure 2 shows the Maximum
Output Duty Cycle versus Oscillator Frequency. Note that
even at 500 kHz, each output is capable of approximately
44% on–time, making this controller suitable for high
frequency power conversion applications.
In many noise sensitive applications it may be desirable to
frequency–lock the converter to an external system clock.
This can be accomplished by applying a clock signal as
shown in Figure 17. For reliable locking, the free–running
oscillator frequency should be set about 10% less than the
clock frequency. Referring to the timing diagram shown in
Figure 16, the rising edge of the clock signal applied to the
Sync input, terminates charging of CT and Drive Output 2
conduction. By tailoring the clock waveform symmetry,
accurate duty cycle clamping of either output can be
achieved. A circuit method for this, and multi–unit
synchronization, is shown in Figure 18.
Error Amplifier
Each channel contains a fully–compensated Error
Amplifier with access to the inverting input and output. The
amplifier features a typical dc voltage gain of 100 dB, and a
unity gain bandwidth of 1.0 MHz with 71° of phase margin
(Figure 5). The noninverting input is internally biased at 2.5 V
and is not pinned out. The converter output voltage is
typically divided down and monitored by the inverting input
through a resistor divider. The maximum input bias current is
–1.0 µA which will cause an output voltage error that is equal
to the product of the input bias current and the equivalent
input divider source resistance.
The Error Amp output (Pin 5, 12) is provided for external
loop compensation. The output voltage is offset by two diode
drops (1.4 V) and divided by three before it connects to the
inverting input of the Current Sense Comparator. This
guarantees that no pulses appear at the Drive Output (Pin 7,
10) when the error amplifier output is at its lowest state (VOL).
This occurs when the power supply is operating and the load
is removed, or at the beginning of a soft–start interval
(Figures 20, 21).
The minimum allowable Error Amp feedback resistance is
limited by the amplifier’s source current (0.5 mA) and the
output voltage (VOH) required to reach the comparator’s 1.0 V
clamp level with the inverting input at ground. This condition
happens during initial system startup or when the sensed
output is shorted:
)Rf(min)
3.0
(1.0 V)
0.5 mA
1.4
V
= 8800
Current Sense Comparator and PWM Latch
The MC34065 operates as a current mode controller,
whereby output switch conduction is initiated by the oscillator
and terminated when the peak inductor current reaches the
threshold level established by the Error Amplifier output.
Thus the error signal controls the peak inductor current on a
cycle–by–cycle basis. The Current Sense Comparator–PWM
Latch configuration used ensures that only a single pulse
appears at the Drive Output during any given oscillator cycle.
The inductor current is converted to a voltage by inserting a
ground–referenced sense resistor RS in series with the
source of output switch Q1. This voltage is monitored by the
Current Sense Input (Pin 6, 11) and compared to a level
derived from the Error Amp output. The peak inductor current
under normal operating conditions is controlled by the
voltage at Pin 5, 12 where:
Ipk =
V(Pin 5, 12) – 1.4 V
3 RS
Abnormal operating conditions occur when the power
supply output is overloaded or if output voltage sensing is
lost. Under these conditions, the Current Sense Comparator
threshold will be internally clamped to 1.0 V. Therefore the
maximum peak switch current is:
Ipk(max) =
1.0 V
RS
When designing a high power switching regulator it may
be desirable to reduce the internal clamp voltage in order to
keep the power dissipation of RS to a reasonable level. A
simple method to adjust this voltage is shown in Figure 19.
The two external diodes are used to compensate the internal
diodes, yielding a constant clamp voltage over temperature.
Erratic operation due to noise pickup can result if there is an
excessive reduction of the Ipk(max) clamp voltage.
A narrow spike on the leading edge of the current
waveform can usually be observed and may cause the power
supply to exhibit an instability when the output is lightly
loaded. This spike is due to the power transformer
interwinding capacitance and output rectifier recovery time.
The addition of an RC filter on the Current Sense input with a
time constant that approximates the spike duration will
usually eliminate the instability, refer to Figure 24.
6 MOTOROLA ANALOG IC DEVICE DATA

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部品番号部品説明メーカ
MC33065-H

(MC3x065-x) High Performance Dual Channel Current Mode Controllers

ON Semiconductor
ON Semiconductor
MC33065-H

High Performance Dual Channel Current Mode Controllers

Motorola Semiconductors
Motorola Semiconductors
MC33065-L

(MC3x065-x) High Performance Dual Channel Current Mode Controllers

ON Semiconductor
ON Semiconductor
MC33065-L

High Performance Dual Channel Current Mode Controllers

Motorola Semiconductors
Motorola Semiconductors


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