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DM74175のメーカーはNational Semiconductorです、この部品の機能は「Hex/Quad D Flip-Flops」です。 |
部品番号 | DM74175 |
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部品説明 | Hex/Quad D Flip-Flops | ||
メーカ | National Semiconductor | ||
ロゴ | |||
このページの下部にプレビューとDM74175ダウンロード(pdfファイル)リンクがあります。 Total 8 pages
June 1989
54174 DM54174 DM74174 54175 DM54175 DM74175
Hex Quad D Flip-Flops with Clear
General Description
These positive-edge triggered flip-flops utilize TTL circuitry
to implement D-type flip-flop logic All have a direct clear
input and the quad (175) version features complementary
outputs from each flip-flop
Information at the D inputs meeting the setup and hold time
requirements is transferred to the Q outputs on the positive-
going edge of the clock pulse Clock triggering occurs at a
particular voltage level and is not directly related to the tran-
sition time of the positive-going pulse When the clock input
is at either the high or low level the D input signal has no
effect at the output
Features
Y 174 contains six flip-flops with single-rail outputs
Y 175 contains four flip-flops with double-rail outputs
Y Buffered clock and direct clear inputs
Y Individual data input to each flip-flop
Y Applications include
Buffer storage registers
Shift registers
Pattern generators
Y Typical clock frequency 40 MHz
Y Typical power dissipation per flip-flop 38 mW
Y Alternate Military Aerospace device (54174 54175) is
available Contact a National Semiconductor Sales Of-
fice Distributor for specifications
Connection Diagrams
Dual-In-Line Package
Dual-In-Line Package
TL F 6557 – 1
Order Number 54174DMQB 54174FMQB DM54174J
DM54174W or DM74174N
See NS Package Number J16A N16E or W16A
TL F 6557 – 2
Order Number 54175DMQB 54175FMQB DM54175J
DM54175W or DM74175N
See NS Package Number J16A N16E or W16A
Function Table (Each Flip-Flop)
C1995 National Semiconductor Corporation
Inputs
Outputs
Clear
Clock
D
Q
Q
L X XL H
H
u HH
L
H
u LL
H
H
L
X Q0
Q0
H e High Level (steady state)
L e Low Level (steady state)
X e Don’t Care
u e Transition from low to high level
Q0 e The level of Q before the indicated steady-state input conditions were established
e 175 only
TL F 6557
RRD-B30M105 Printed in U S A
1 Page ’174 Switching Characteristics
at VCC e 5V and TA e 25 C (See Section 1 for Test Waveforms and Output Load)
Symbol
Parameter
From (Input)
To (Output)
RL e 400X CL e 15 pF
Min Max
fMAX
Maximum Clock
Frequency
30
tPLH Propagation Delay Time Clock to
Low to High Level Output
Any Q
25
tPHL Propagation Delay Time Clock to
High to Low Level Output
Any Q
25
tPHL Propagation Delay Time Clear to
High to Low Level Output
Any Q
40
Units
MHz
ns
ns
ns
Recommended Operating Conditions
Symbol
Parameter
VCC
VIH
VIL
IOH
IOL
fCLK
tW
Supply Voltage
High Level Input Voltage
Low Level Input Voltage
High Level Output Current
Low Level Output Current
Clock Frequency (Note 1)
Pulse Width
(Note 1)
Clock Low
Clock High
Clear
tSU Data Setup Time (Note 1)
tH Data Hold Time (Note 1)
tREL
Clear Release Time (Note 1)
TA Free Air Operating Temperature
Note 1 TA e 25 C and VCC e 5V
DM54175
Min Nom
45 5
2
0
25
10
20
20
0
30
b55
Max
55
08
b0 8
16
30
125
DM74175
Min Nom Max
4 75 5
5 25
2
08
b0 8
16
0 30
25
10
20
20
0
30
0 70
Units
V
V
V
mA
mA
MHz
ns
ns
ns
ns
C
3
3Pages 6
6 Page | |||
ページ | 合計 : 8 ページ | ||
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PDF ダウンロード | [ DM74175 データシート.PDF ] |
データシートを活用すると、その部品の主な機能と仕様を詳しく理解できます。 ピン構成、電気的特性、動作パラメータ、性能を確認してください。 |
部品番号 | 部品説明 | メーカ |
DM7417 | Hex Buffers with High Voltage Open-Collector Outputs | Fairchild Semiconductor |
DM7417 | High Voltage Open-Collector Outputs | National Semiconductor |
DM74173 | Quad D Registers | National Semiconductor |
DM74174 | Hex/Quad D-Type Flip-Flop with Clear | Fairchild Semiconductor |