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PDF AT24C64A Data sheet ( Hoja de datos )
| Número de pieza | AT24C64A | |
| Descripción | Two-wire Serial EEPROM | |
| Fabricantes | ATMEL Corporation | |
| Logotipo |  |
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Features
• Low-Voltage and Standard-Voltage Operation
– 2.7 (VCC = 2.7V to 5.5V)
– 1.8 (VCC = 1.8V to 5.5V)
• Low-Power Devices (ISB = 6 µA @ 5.5V) Available
• Internally Organized 4096 x 8, 8192 x 8
• Two-wire Serial Interface
• Schmitt Trigger, Filtered Inputs for Noise Suppression
• Bidirectional Data Transfer Protocol
• 400 kHz (1.8V, 2.5V, 2.7V, 5V) Compatibility
• Write Protect Pin for Hardware Data Protection
• 32-byte Page Write Mode (Partial Page Writes Allowed)
• Self-timed Write Cycle (5 ms Max)
• High Reliability
– Endurance: 1 Million Write Cycles
– Data Retention: 100 Years
• Automotive Devices Available
• 8-lead JEDEC PDIP, 8-lead JEDEC SOIC, 8-lead EIAJ SOIC, 8-lead Mini-MAP (MLP 2x3)
and 8-lead TSSOP Packages
• Lead-free/Halogen-free
• Die Sales: Wafer Form, Waffle Pack, and Bumped Wafers
Description
The AT24C32A/64A provides 32,768/65,536 bits of serial electrically erasable and
programmable read only memory (EEPROM) organized as 4096/8192 words of 8 bits
each. The device’s cascadable feature allows up to 8 devices to share a common two-
wire bus. The device is optimized for use in many industrial and commercial applica-
tions where low power and low voltage operation are essential. The AT24C32A/64A is
available in space saving 8-lead JEDEC PDIP, 8-lead JEDEC SOIC, 8-lead EIAJ
SOIC, 8-lead Mini-MAP (MLP 2x3) and 8-lead TSSOP packages and is accessed via
a 2-wire serial interface. In addition, the entire family is available in 2.7V (2.7V to 5.5V)
and 1.8V (1.8V to 5.5V) versions.
Two-wire
Serial EEPROM
32K (4096 x 8)
64K (8192 x 8)
AT24C32A(1)
AT24C64A(2)
Notes: 1. Not recommended for
new design; please
refer to AT24C32C.
2. Not recommended for
new design; please
refer to AT24C64C.
Table 1. Pin Configuration
Pin Name Function
A0 – A2
Address Inputs
SDA
Serial Data
SCL Serial Clock Input
WP Write Protect
8-lead SOIC
8-lead Mini-MAP (MLP 2x3)
A0
A1
A2
GND
1
2
3
4
8 VCC
7 WP
6 SCL
5 SDA
VCC
WP
SCL
SDA
8
7
6
5
1 A0
2 A1
3 A2
4 GND
Bottom View
8-lead TSSOP
A0
A1
A2
GND
1
2
3
4
8 VCC
7 WP
6 SCL
5 SDA
8-lead PDIP
A0
A1
A2
GND
1
2
3
4
8 VCC
7 WP
6 SCL
5 SDA
3054T–SEEPR–1/07
1
1 page  
AT24C32A/64A
Table 4. AC Characteristics
Applicable over recommended operating range from TAI = –40°C to +85°C, VCC = +1.8V to +5.5V, CL = 1 TTL Gate and
100 pF (unless otherwise noted)
1.8, 2.5, 2.7, 5.0-volt
Symbol
Parameter
Min Max Units
fSCL
tLOW
tHIGH
tI
tAA
tBUF
Clock Frequency, SCL
Clock Pulse Width Low
Clock Pulse Width High
Noise Suppression Time(1)
Clock Low to Data Out Valid
Time the bus must be free
before a new transmission
can start(1)
400 kHz
1.2 µs
0.6 µs
50 ns
0.1 0.9 µs
1.2 µs
tHD.STA
tSU.STA
tHD.DAT
tSU.DAT
tR
tF
tSU.STO
tDH
tWR
Endurance(1)
Start Hold Time
Start Set-up Time
Data In Hold Time
Data In Set-up Time
Inputs Rise Time(1)
Inputs Fall Time(1)
Stop Setup Time
Data Out Hold Time
Write Cycle Time
5.0V, 25°C, Page Mode
0.6 µs
0.6 µs
0 µs
100 ns
0.3 µs
300 ns
0.6 µs
50 ns
5 ms
1M Write Cycles
Note: 1. This parameter is ensured by characterization only.
3054T–SEEPR–1/07
5
5 Page 
Figure 7. Device Address
Figure 8. Byte Write
Figure 9. Page Write
Notes: 1. * = DON’T CARE bits
2. † = DON’T CARE bits for the 32K
Figure 10. Current Address Read
AT24C32A/64A
3054T–SEEPR–1/07
11
11 Page | ||
| Páginas | Total 22 Páginas | |
| PDF Descargar | [ Datasheet AT24C64A.PDF ] | |
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