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S29GL512N の電気的特性と機能

S29GL512NのメーカーはCypress Semiconductorです、この部品の機能は「3.0V single power flash memory」です。


製品の詳細 ( Datasheet PDF )

部品番号 S29GL512N
部品説明 3.0V single power flash memory
メーカ Cypress Semiconductor
ロゴ Cypress Semiconductor ロゴ 




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S29GL512N Datasheet, S29GL512N PDF,ピン配置, 機能
S29GL512N
S29GL256N
S29GL128N
512, 256, 128 Mbit, 3 V, Page Flash
Featuring 110 nm MirrorBit
This product family has been retired and is not recommended for designs. For new and current designs, S29GL128S, S29GL256S,
and S29GL512T supersede the S29GL128N, S29GL256N, and S29GL512N respectively. These are the factory-recommended
migration paths. Please refer to the S29GL-S and S29GL-T Family data sheets for specifications and ordering information.
Distinctive Characteristics
Architectural Advantages
Single Power Supply Operation
– 3 volt read, erase, and program operations
Enhanced VersatileI/OControl
– All input levels (address, control, and DQ input levels) and outputs
are determined by voltage on VIO input. VIO range is 1.65 to VCC
Manufactured on 110 nm MirrorBit Process Technology
Secured Silicon Sector Region
– 128-word/256-byte sector for permanent, secure identification
through an 8-word/16-byte random Electronic Serial Number,
accessible through a command sequence
– May be programmed and locked at the factory or by the customer
Flexible Sector Architecture
– S29GL512N: Five hundred twelve 64 Kword (128 Kbyte) sectors
– S29GL256N: Two hundred fifty-six 64 Kword (128 Kbyte) sectors
– S29GL128N: One hundred twenty-eight 64 Kword (128 Kbyte)
sectors
Compatibility with JEDEC Standards
– Provides pinout and software compatibility for single-power supply
flash, and superior inadvertent write protection
100,000 Erase Cycles per sector typical
20-year Data Retention typical
Performance Characteristics
High Performance
– 90 ns access time (S29GL128N, S29GL256N)
– 100 ns (S29GL512N)
– 8-word/16-byte page read buffer
– 25 ns page read times
– 16-word/32-byte write buffer reduces overall programming time for
multiple-word updates
Low Power Consumption (typical values at 3.0 V, 5 MHz)
– 25 mA typical active read current;
– 50 mA typical erase/program current
– 1 µA typical standby mode current
Package Options
– 56-pin TSOP
– 64-ball Fortified BGA
Software & Hardware Features
Software Features
– Program Suspend and Resume: read other sectors before
programming operation is completed
– Erase Suspend and Resume: read/program other sectors before
an erase operation is completed
– Data# polling and toggle bits provide status
– Unlock Bypass Program command reduces overall multiple-word
programming time
– CFI (Common Flash Interface) compliant: allows host system to
identify and accommodate multiple flash devices
Hardware Features
– Advanced Sector Protection
– WP#/ACC input accelerates programming time (when high
voltage is applied) for greater throughput during system
production. Protects first or last sector regardless of sector
protection settings
– Hardware reset input (RESET#) resets device
– Ready/Busy# output (RY/BY#) detects program or erase cycle
completion
Product Availability Table
Density
512 Mb
256 Mb
128 Mb
Init. Access
110 ns
100 ns
110 ns
100 ns
90 ns
110 ns
100 ns
90 ns
VCC
Full
Full
Full
Full
Regulated
Full
Full
Regulated
Availability
Now
Now
Now
Now
Now
Now
Now
Now
Cypress Semiconductor Corporation • 198 Champion Court
Document Number: 002-01522 Rev. *B
• San Jose, CA 95134-1709 • 408-943-2600
Revised January 08, 2016

1 Page





S29GL512N pdf, ピン配列
S29GL512N
S29GL256N
S29GL128N
Contents
1. Product Selector Guide ............................................... 4
1.1 S29GL512N ................................................................... 4
1.2 S29GL256N, S29GL128N ............................................. 4
2. Block Diagram.............................................................. 5
3. Connection Diagrams.................................................. 6
3.1 Special Package Handling Instructions.......................... 7
4. Pin Description............................................................. 7
5. Logic Symbol ............................................................... 7
6. Ordering Information ................................................... 9
7. Device Bus Operations.............................................. 10
7.1 Word/Byte Configuration.............................................. 10
7.2 VersatileIOTM (VIO) Control .......................................... 10
7.3 Requirements for Reading Array Data......................... 10
7.4 Writing Commands/Command Sequences.................. 11
7.5 Standby Mode.............................................................. 11
7.6 Automatic Sleep Mode................................................. 12
7.7 RESET#: Hardware Reset Pin..................................... 12
7.8 Output Disable Mode ................................................... 13
7.9 Autoselect Mode .......................................................... 34
7.10 Sector Protection ......................................................... 34
7.11 Advanced Sector Protection ........................................ 35
7.12 Lock Register ............................................................... 35
7.13 Persistent Sector Protection ........................................ 36
7.14 Persistent Protection Mode Lock Bit ............................ 37
7.15 Password Sector Protection......................................... 38
7.16 Password and Password Protection Mode Lock Bit .... 38
7.17 64-bit Password ........................................................... 38
7.18 Persistent Protection Bit Lock (PPB Lock Bit).............. 38
7.19 Secured Silicon Sector Flash Memory Region ............ 39
7.20 Write Protect (WP#) ..................................................... 40
7.21 Hardware Data Protection............................................ 40
8. Common Flash Memory Interface (CFI) ................... 40
9. Command Definitions................................................ 43
9.1 Reading Array Data ..................................................... 43
9.2 Reset Command .......................................................... 43
9.3 Autoselect Command Sequence ................................. 44
9.4 Enter Secured Silicon Sector/Exit Secured Silicon
Sector Command Sequence........................................ 44
9.5 Word Program Command Sequence........................... 44
9.6 Program Suspend/Program Resume Command
Sequence..................................................................... 48
9.7 Chip Erase Command Sequence ................................ 49
9.8 Sector Erase Command Sequence ............................. 50
9.9 Erase Suspend/Erase Resume Commands ................ 51
9.10 Lock Register Command Set Definitions ..................... 51
9.11 Password Protection Command Set Definitions .......... 52
9.12 Non-Volatile Sector Protection Command Set
Definitions .................................................................... 52
9.13 Global Volatile Sector Protection Freeze Command
Set............................................................................... 53
9.14 Volatile Sector Protection Command Set..................... 53
9.15 Secured Silicon Sector Entry Command....................... 54
9.16 Secured Silicon Sector Exit Command ......................... 54
9.17 Command Definitions.................................................... 54
10. Write Operation Status ............................................... 59
10.1 DQ7: Data# Polling ....................................................... 59
10.2 RY/BY#: Ready/Busy#.................................................. 60
10.3 DQ6: Toggle Bit I .......................................................... 60
10.4 DQ2: Toggle Bit II ......................................................... 62
10.5 Reading Toggle Bits DQ6/DQ2..................................... 62
10.6 DQ5: Exceeded Timing Limits ...................................... 62
10.7 DQ3: Sector Erase Timer.............................................. 63
10.8 DQ1: Write-to-Buffer Abort............................................ 63
11. Absolute Maximum Ratings....................................... 64
12. Operating Ranges ....................................................... 65
13. DC Characteristics...................................................... 65
13.1 CMOS Compatible ........................................................ 65
14. Test Conditions ........................................................... 66
14.1 Key to Switching Waveforms ........................................ 67
15. AC Characteristics...................................................... 68
15.1 Read-Only Operations .................................................. 68
15.2 Hardware Reset (RESET#)........................................... 69
15.3 Erase and Program Operations .................................... 71
15.4 Alternate CE# Controlled Erase and Program Operations:
S29GL128N, S29GL256N, S29GL512N....................... 75
16. Erase And Programming Performance..................... 77
17. TSOP Pin and BGA Package Capacitance................ 77
18. Physical Dimensions .................................................. 78
18.1 TS056—56-Pin Standard Thin Small Outline Package
(TSOP).......................................................................... 78
18.2 LAA064—64-Ball Fortified Ball Grid Array (FBGA)....... 79
19. Advance Information on S29GL-P Hardware Reset
(RESET#) and Power-up Sequence ................................... 80
20. Advance Information on S29GL-R 65 nm MirrorBit .....
Hardware Reset (RESET#) and Power-up Sequence ....... 82
21. Document History Page ............................................. 84
Document Number: 002-01522 Rev. *B
Page 3 of 92


3Pages


S29GL512N 電子部品, 半導体
S29GL512N
S29GL256N
S29GL128N
3. Connection Diagrams
NC for S29GL128N
A23 1
A22 2
A15 3
A14 4
A13 5
A12 6
A11 7
A10 8
A9 9
A8 10
A19 11
A20 12
WE# 13
RESET# 14
A21 15
WP#/ACC 16
RY/BY# 17
A18 18
A17 19
A7 20
A6 21
A5 22
A4 23
A3 24
A2 25
A1 26
NC 27
NC 28
Figure 3.1 56-Pin Standard TSOP
Figure 3.2 64-ball Fortified BGA
Top View, Balls Facing Down
56 A24
55 NC
54 A16
53 BYTE#
52 VSS
51 DQ15/A-1
50 DQ7
49 DQ14
48 DQ6
47 DQ13
46 DQ5
45 DQ12
44 DQ4
43 VCC
42 DQ11
41 DQ3
40 DQ10
39 DQ2
38 DQ9
37 DQ1
36 DQ8
35 DQ0
34 OE#
33 VSS
32 CE#
31 A0
30 NC
29 VIO
NC for S29GL256N
and S29GL128N
A8 B8 C8 D8 E8 F8 G8 H8
NC A22 A231 VIO VSS A242 NC NC
A7 B7 C7 D7 E7 F7 G7 H7
A13 A12 A14 A15 A16 BYTE# DQ15/A-1 VSS
A6 B6 C6 D6 E6 F6 G6 H6
A9 A8 A10 A11 DQ7 DQ14 DQ13 DQ6
A5 B5 C5 D5 E5 F5 G5 H5
WE# RESET# A21 A19 DQ5 DQ12 VCC DQ4
A4 B4 C4 D4 E4 F4 G4 H4
RY/BY# WP#/ACC A18 A20 DQ2 DQ10 DQ11 DQ3
A3 B3 C3 D3 E3 F3 G3 H3
A7 A17 A6 A5 DQ0 DQ8 DQ9 DQ1
A2 B2 C2 D2 E2 F2 G2 H2
A3 A4 A2 A1 A0 CE# OE# VSS
A1 B1 C1 D1 E1 F1 G1 H1
NC NC NC NC NC VIO NC NC
Notes
1. Ball C8 is NC on S29GL128N
2. Ball F8 is NC on S29GL256N and S29GL128N
Document Number: 002-01522 Rev. *B
Page 6 of 92

6 Page



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部品番号部品説明メーカ
S29GL512N

3.0V single power flash memory

Cypress Semiconductor
Cypress Semiconductor
S29GL512N

MirrorBit Flash Family

ETC
ETC
S29GL512N

Page Mode Flash Memory

SPANSION
SPANSION
S29GL512P

Page Mode Flash Memory

SPANSION
SPANSION


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