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STA369BW の電気的特性と機能

STA369BWのメーカーはSTMicroelectronicsです、この部品の機能は「2.1-channel high-efficiency digital audio system」です。


製品の詳細 ( Datasheet PDF )

部品番号 STA369BW
部品説明 2.1-channel high-efficiency digital audio system
メーカ STMicroelectronics
ロゴ STMicroelectronics ロゴ 




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STA369BW Datasheet, STA369BW PDF,ピン配置, 機能
STA369BW
2.1-channel high-efficiency digital audio system
Sound Terminal®
Datasheet - production data
PowerSSO-36
with exposed pad down (EPD)
Features
Wide-range supply voltage
– 5 V to 26 V (operating range)
– 30 V (absolute maximum rating)
Four power output configurations
– 2 channels of ternary PWM (stereo mode)
(2 x 30 W into 8 at 22 V)
– 3 channels - left, right using binary and LFE
using ternary PWM (2.1 mode) (2 x 15 W +
1 x 30 W into 2 x 4, 1 x 8 at 22 V)
– 2 channels of ternary PWM (2 x 30 W) +
stereo lineout ternary)
FFX®100 dB SNR and dynamic range
Selectable 32 to 192 kHz input sampling rates
I2C control with selectable device address
Digital gain/attenuation +42 dB to -80 dB with
0.125 dB/step resolution
Soft-volume update with programmable ratio
Individual channel and master gain/attenuation
Two independent DRCs configurable as a
dual-band anti-clipper (B2DRC) or independent
limiters/compressors
EQ-DRC for DRC based on filtered signals
Dedicated LFE processing for bass boosting
with 0.125 dB/step resolution
Audio presets:
– 15 preset crossover filters
– 5 preset anti-clipping modes
– Preset nighttime listening mode
Individual channel and master soft/hard mute
Independent channel volume and DSP bypass
Automatic zero-detect mute
Automatic invalid input-detect mute
I2S input data interface
Input and output channel mapping
Up to 8 user-programmable biquads per
channel
3 coefficient banks for EQ presets storing with
fast recall via I2C interface
Extended coefficient dynamic up to -4..4 for
easy implementation of high shelf filters
Bass/treble tones and de-emphasis control
Selectable high-pass filter for DC blocking
Advanced AM interference frequency
switching and noise suppression modes
Selectable high- or low-bandwidth
noise-shaping topologies
Selectable clock input ratio
96 kHz internal processing sampling rate with
quantization error noise shaping for very low
cutoff frequency filters
Thermal overload and short-circuit protection
embedded
Video apps: 576 x Fs input mode supported
Fully compatible with STA339BW,
STA369BWS and STA350BW
Table 1. Device summary
Order code
Package
Packing
STA369BW Power SSO-36
Tube
STA369BWTR Power SSO-36 Tape and reel
September 2013
This is information on a product in full production.
DocID022033 Rev 2
1/89
www.st.com

1 Page





STA369BW pdf, ピン配列
STA369BW
Contents
7.4 Read operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
7.4.1 Current address byte read . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
7.4.2 Current address multi-byte read . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
7.4.3 Random address byte read . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
7.4.4 Random address multi-byte read . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
7.4.5 Write mode sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
7.4.6 Read mode sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
8 Register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
8.1 Configuration register A (addr 0x00) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
8.1.1 Master clock select . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
8.1.2 Interpolation ratio select . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
8.1.3 Thermal warning recovery bypass . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
8.1.4 Thermal warning adjustment bypass . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
8.1.5 Fault detect recovery bypass . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
8.2 Configuration register B (addr 0x01) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
8.2.1 Serial audio input interface format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
8.2.2 Serial data interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
8.2.3 Serial data first bit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
8.2.4 Delay serial clock enable . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
8.2.5 Channel input mapping . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
8.3 Configuration register C (addr 0x02) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40
8.3.1 FFX power output mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40
8.3.2 FFX compensating pulse size register . . . . . . . . . . . . . . . . . . . . . . . . . . 40
8.3.3 Overcurrent warning detect adjustment bypass . . . . . . . . . . . . . . . . . . 41
8.4 Configuration register D (addr 0x03) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41
8.4.1 High-pass filter bypass . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41
8.4.2 De-emphasis . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41
8.4.3 DSP bypass . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42
8.4.4 Post-scale link . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42
8.4.5 Biquad coefficient link . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42
8.4.6 Dynamic range compression/anti-clipping bit . . . . . . . . . . . . . . . . . . . . 42
8.4.7 Zero-detect mute enable . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43
8.4.8 Submix mode enable . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43
8.5 Configuration register E (addr 0x04) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43
8.5.1 Max power correction variable . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43
DocID022033 Rev 2
3/89
89


3Pages


STA369BW 電子部品, 半導体
Contents
STA369BW
8.19
8.20
8.21
8.22
8.23
8.24
8.18.1 Dual-band DRC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73
8.18.2 EQ DRC mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 74
8.18.3 Extended post-scale range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 75
8.18.4 Extended attack rate . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 75
8.18.5 Extended BIQUAD selector . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 76
EQ soft-volume configuration registers (addr 0x37 - 0x38) . . . . . . . . . . . 76
DRC RMS filter coefficients (addr 0x39-0x3E) . . . . . . . . . . . . . . . . . . . . . 77
Extra volume resolution configuration registers (address 0x3F) . . . . . . . 78
Quantization error noise correction (address 0x48) . . . . . . . . . . . . . . . . . 79
Extended coefficient range up to -4...4 (address 0x49, 0x4A) . . . . . . . . . 80
Miscellaneous registers (address 0x4B, 0x4C) . . . . . . . . . . . . . . . . . . . . 81
8.24.1 Rate powerdown enable (RPDNEN) bit (address 0x4B, bit D7) . . . . . . 81
8.24.2 Noise-shaping on DC cut filter enable (NSHHPEN) bit
(address 0x4B, bit D6) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 81
8.24.3 Bridge immediate off (BRIDGOFF) bit (address 0x4B, bit D5) . . . . . . . 81
8.24.4 Channel PWM enable (CPWMEN) bit (address 0x4B, bit D2) . . . . . . . 82
8.24.5 Power-down delay selector (PNDLSL[2:0]) bits (address 0x4C,
bit D4, D3, D2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 82
9 Application . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 83
9.1 Application scheme for power supplies . . . . . . . . . . . . . . . . . . . . . . . . . . 83
9.2 PLL filter schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 83
9.3 Typical output configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 83
10 Package thermal characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 85
11 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 86
12 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 88
6/89 DocID022033 Rev 2

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ダウンロード
[ STA369BW データシート.PDF ]


データシートを活用すると、その部品の主な機能と仕様を詳しく理解できます。 ピン構成、電気的特性、動作パラメータ、性能を確認してください。


共有リンク

Link :


部品番号部品説明メーカ
STA369BW

2.1-channel high-efficiency digital audio system

STMicroelectronics
STMicroelectronics
STA369BWTR

2.1-channel high-efficiency digital audio system

STMicroelectronics
STMicroelectronics


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