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GX3290 の電気的特性と機能

GX3290のメーカーはSemtechです、この部品の機能は「290 x 290 3.5Gb/s Crosspoint Switch」です。


製品の詳細 ( Datasheet PDF )

部品番号 GX3290
部品説明 290 x 290 3.5Gb/s Crosspoint Switch
メーカ Semtech
ロゴ Semtech ロゴ 




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GX3290 Datasheet, GX3290 PDF,ピン配置, 機能
GX3290
290 x 290 3.5Gb/s Crosspoint Switch with Trace Equalization and Output
De-emphasis
Key Features
• 290 x 290 crosspoint switch architecture supporting
broadcast and multi-cast modes
• Supports all data rates up to 3.5Gb/s
• Low power consumption: 34.25W typical (all channels
active)
• Sophisticated, dynamic on-chip power management
control
• Independent, programmable input trace equalization
to reduce deterministic jitter (ISI)
• Independent, programmable output de-emphasis for
driving long board traces
• High-speed, video-optimized control for multi-format
applications
• Built-in system test features with on-chip PRBS
generators and analyzers
• 2.5V analog core voltage, 1.8V digital core voltage
• Input and output voltages support either 1.2V, 1.8V or
2.5V CML
• JTAG-controlled boundary scan
• Selectable parallel/serial host interface
• 50mm x 50mm BGA (2377 ball)
• Operating temperature range: 0°C to +85°C
• RoHS compliant
Applications
Large m x n cascaded routers/switch fabrics for:
• Professional broadcast applications
• Enterprise and carrier applications
• High-speed automated test equipment
• 10GbE and InfiniBand networks
Description
The GX3290 is a low-power, high-speed 290 x 290
crosspoint switch, with robust signal conditioning circuits
for driving and receiving high-speed signals through
backplanes.
The device typically consumes 34.25W of power with all
channels operational, and features sophisticated,
dynamically scalable power management. Unused
portions of the core are automatically turned off without
affecting the operation of the remaining channels.
The signal conditioning features of the GX3290 include
per-input programmable equalization and per-output
programmable de-emphasis. The input equalizer removes
ISI jitter—typically caused by PCB trace losses—by
opening the input data eye in applications where long PCB
traces are used. There are four settings available for the
input equalizer, allowing flexibility in adjusting the
equalization level on a per-input basis.
Output de-emphasis capability provides a boost of the
high-frequency content of the output signal, such that the
data eye remains open after passing through a long
interconnect of PCB traces and connectors. There are four
de-emphasis settings that can be enabled on a per-output
basis.
Two integrated programmable pattern generators, and two
pattern checkers are provided to assist in system test and
configuration.
The pattern generators can each be routed to any output of
the device without impacting the normal operation of any
other channel. Any input can be routed to each of the
pattern checkers.
The chip features eight independent strobe inputs,
UPDATE_EN[7:0], which are used to determine the timing
of the output updates. Any output can be linked to any
strobe.
GX3290 290 x 290 3.5Gb/s Crosspoint
Final Data Sheet Rev. 2
GENDOC-053317 March 2013
www.semtech.com
1 of 47
Proprietary & Confidential

1 Page





GX3290 pdf, ピン配列
Revision History
Version
2
ECO
011719
1 158372
0 157403
F 157275
E 156342
D 154735
C 154303
B 153176
A 152552
PCN
Date
Changes and/or Modifications
March 2013
Corrected second bullet in Section 4.7.1, and added a note to
Section 4.4.
October 2012
Included ESD Voltage Sensitivity in Table 2-1. Modifications to
Table 4-18 and Section 4.12.2 to include Auto-Increment Timing
and functionality. Updates to Appendix - Relevant
Documentation with clear reference to correct documents.
Converted document to Final Data Sheet.
February 2012
Converted document to Preliminary Data Sheet. Updates
throughout.
November 2011 Minor updates through entire document.
July 2011
Updates throughout entire document. Removed Configuration
and Status Registers (transferred to document Crosspoint
(GX3290 and family) Reference Manual (for CSRs)).
September 2010
Changed maximum data rate to 3.5Gb/s. Updates to Figure 4-10
and Figure 4-11, 4.12.2 Serial Host Interface Specifications,
Package Dimensions and Marking Diagram.
July 2010
Updates throughout entire document. Changes to GX3290 Ball
Assignment Overview (Top View). Addition of multiple sections
in Section 4. Detailed Description. Addition of Ball Descriptions.
Changes to Input/Output Equivalent Circuits and Application
Information.
January 2010
Updates to Table 2-3: DC Electrical Characteristics. Updates to
Section 4.12 Host Interface. Updates to Figure 1-1: GX3290 Ball
Assignment Overview (Top View). Addition of Section 3.
Input/Output Equivalent Circuits.
October 2009 New document.
GX3290 290 x 290 3.5Gb/s Crosspoint
Final Data Sheet Rev. 2
GENDOC-053317 March 2013
www.semtech.com
3 of 47
Proprietary & Confidential


3Pages


GX3290 電子部品, 半導体
1.2 Ball Descriptions
Table 1-1 shows the descriptions for selected GX3290 balls. For a comprehensive list of
balls from the GX3290 Crosspoint family, please refer to GX3290 (and family) Crosspoint
Ball Guide.
Table 1-1: Ball Descriptions
Ball #
Ball Name
Serial Interface I/O
AN16
AN17
AN18
SCLK
SDIN
SDOUT
AN19
S_CS
Parallel Interface I/O
AL23
P_CS
AL24
P_R/W
AL25
AM27 - AM16
AN35 - AN20
General I/O
P_ADS
P_ADD[11:0]
P_DAT[15:0]
AN15
AM35 - AM28
AR33
AR35
Test Interface
AL17
AL18
AL19
AL20
HOST_S/P
UPDATE_EN
[7:0]
POR_DFT
RESET
TCK
TMS
TDO
TDI
I/O Description
I Serial Host Interface Clock. If unused, tie to ground.
I Serial Host Interface Data Input. If unused, tie to ground.
O Serial Host Interface Data Output. Leave NC if not used.
I
Serial Host Interface Chip Select. Active-LOW. Must be tied LOW when HOST_S/P is
set LOW.
I
Parallel host interface chip select. Active-LOW. Must be tied LOW when HOST_S/P is
set HIGH.
I
Selects between read and write operations on the parallel host interface.
HIGH = Read, LOW = Write. If unused, tie to ground.
I
Address and Data Strobe. Strobe signal for latching the address and data into the
chip. See Section 4.12.1 for timing information. If unused, tie to ground.
I Address bus for the parallel interface. If unused, tie to ground.
I/O
Bi-directional data bus for the parallel interface. If P_CS is HIGH, these pins are
configured as inputs. If unused, tie to ground.
Host Interface Select pin. Selects between serial and parallel host interfaces. Serial
I host interface is enabled when HIGH, parallel host interface is enabled when LOW.
Must assert RESET after changing this pin.
I
Update Strobes used to update the switch matrix configuration (see Section 4.5). If
unused, weak pull-down to ground.
I
This pin disables the Power On Reset circuitry when HIGH. Weak internal pull-down.
Leave NC if not used.
I
Active-LOW reset for entire chip (see Section 4.11 for timing details). Weak internal
pull-up. Leave NC if not used.
I JTAG test clock. Weak pull-up if not used.
I JTAG test mode start. Weak pull-up if not used.
O JTAG test data out. Leave NC if not used.
I JTAG test data in. Weak pull-up if not used.
GX3290 290 x 290 3.5Gb/s Crosspoint
Final Data Sheet Rev. 2
GENDOC-053317 March 2013
www.semtech.com
6 of 47
Proprietary & Confidential

6 Page



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部品番号部品説明メーカ
GX3290

290 x 290 3.5Gb/s Crosspoint Switch

Semtech
Semtech


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