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74HC14のメーカーはON Semiconductorです、この部品の機能は「Hex Schmitt-Trigger Inverter」です。 |
部品番号 | 74HC14 |
| |
部品説明 | Hex Schmitt-Trigger Inverter | ||
メーカ | ON Semiconductor | ||
ロゴ | |||
このページの下部にプレビューと74HC14ダウンロード(pdfファイル)リンクがあります。 Total 9 pages
74HC14
Hex Schmitt−Trigger
Inverter
High−Performance Silicon−Gate CMOS
The 74HC14 is identical in pinout to the LS14, LS04 and the HC04.
The device inputs are compatible with Standard CMOS outputs; with
pullup resistors, they are compatible with LSTTL outputs.
The HC14 is useful to “square up” slow input rise and fall times.
Due to hysteresis voltage of the Schmitt trigger, the HC14 finds
applications in noisy environments.
Features
• Output Drive Capability: 10 LSTTL Loads
• Outputs Directly Interface to CMOS, NMOS and TTL
• Operating Voltage Range: 2.0 to 6.0 V
• Low Input Current: 1.0 mA
• High Noise Immunity Characteristic of CMOS Devices
• In Compliance With the JEDEC Standard No. 7A Requirements
• ESD Performance: HBM > 2000 V; Machine Model > 200 V
• Chip Complexity: 60 FETs or 15 Equivalent Gates
• These are Pb−Free Devices
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MARKING
DIAGRAMS
14
1
14
SOIC−14
D SUFFIX
CASE 751A
1
HC14G
AWLYWW
14
1
TSSOP−14
DT SUFFIX
CASE 948G
14
HC
14
ALYW G
1G
HC14 = Device Code
A = Assembly Location
L, WL = Wafer Lot
Y = Year
W, WW = Work Week
G or G = Pb−Free Package
(Note: Microdot may be in either location)
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 2 of this data sheet.
© Semiconductor Components Industries, LLC, 2007
March, 2007 − Rev. 1
1
Publication Order Number:
74HC14/D
1 Page 74HC14
ÎÎMÎÎSAymXÎÎbIMolUÎÎM RÎÎATÎÎINGÎÎS ÎÎÎÎPaÎÎramÎÎeterÎÎÎÎÎÎÎÎÎÎÎÎÎÎVÎÎalueÎÎÎÎÎÎUniÎÎt
VCC DC Supply Voltage (Referenced to GND)
– 0.5 to + 7.0
V
Vin DC Input Voltage (Referenced to GND)
– 0.5 to VCC + 0.5 V
Vout DC Output Voltage (Referenced to GND)
– 0.5 to VCC + 0.5 V
Iin DC Input Current, per Pin
±20 mA
Iout DC Output Current, per Pin
±25 mA
ICC DC Supply Current, VCC and GND Pins
±50 mA
PD Power Dissipation in Still Air,
SOIC Package†
TSSOP Package†
500
450
mW
Tstg Storage Temperature Range
– 65 to + 150
TL Lead Temperature, 1 mm from Case for 10 Seconds
SOIC or TSSOP Package
260
_C
_C
This device contains protection
circuitry to guard against damage
due to high static voltages or electric
fields. However, precautions must
be taken to avoid applications of any
voltage higher than maximum rated
voltages to this high−impedance cir-
cuit. For proper operation, Vin and
Vout should be constrained to the
range GND v (Vin or Vout) v VCC.
Unused inputs must always be
tied to an appropriate logic voltage
level (e.g., either GND or VCC).
Unused outputs must be left open.
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress
ratings only. Functional operation above the Recommended Operating Conditions is not im-
plied. Extended exposure to stresses above the Recommended Operating Conditions may af-
fect device reliability.
†Derating — SOIC Package: – 7 mW/_C from 65_ to 125_C
TSSOP Package: − 6.1 mW/_C from 65_ to 125_C
For high frequency or heavy load considerations, see Chapter 2 of the ON Semiconductor High−Speed CMOS Data Book (DL129/D).
RECOMMENDED OPERATING CONDITIONS
Symbol
Parameter
VCC
Vin, Vout
DC Supply Voltage (Referenced to GND)
DC Input Voltage, Output Voltage (Referenced to
GND)
TA Operating Temperature Range, All Package Types
tr, tf Input Rise/Fall Time
(Figure 1)
*When Vin = 50% VCC, ICC > 1mA
VCC = 2.0 V
VCC = 4.5 V
VCC = 6.0 V
Min
2.0
0
– 55
0
0
0
Max
6.0
VCC
+ 125
No Limit*
No Limit*
No Limit*
Unit
V
V
_C
ns
http://onsemi.com
3
3Pages 74HC14
4
3
(VT+)
VHtyp
2
(VT−)
1
23456
VCC, POWER SUPPLY VOLTAGE (VOLTS)
VHtyp = (VT+ typ) − (VT− typ)
Figure 3. Typical Input Threshold, VT+, VT− versus Power Supply Voltage
A
(a) A Schmitt−Trigger Squares Up Inputs With Slow Rise and Fall Times
VH
Vin
VCC
VT+
VT−
GND
VOH
Vout
VOL
Y
(b) A Schmitt−Trigger Offers Maximum Noise Immunity
VH
Vin
VCC
VT+
VT−
GND
VOH
Vout
VOL
Figure 4. Typical Schmitt−Trigger Applications
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