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Número de pieza | 74LVC1G14 | |
Descripción | Single Schmitt-trigger inverter | |
Fabricantes | NXP Semiconductors | |
Logotipo | ||
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No Preview Available ! 74LVC1G14
Single Schmitt-trigger inverter
Rev. 13 — 15 March 2016
Product data sheet
1. General description
The 74LVC1G14 provides the inverting buffer function with Schmitt-trigger input. It is
capable of transforming slowly changing input signals into sharply defined, jitter-free
output signals.
The input can be driven from either 3.3 V or 5 V devices. This feature allows the use of
this device in a mixed 3.3 V and 5 V environment. Schmitt-trigger action at the input
makes the circuit tolerant for slower input rise and fall time.
This device is fully specified for partial power-down applications using IOFF. The IOFF
circuitry disables the output, preventing the damaging backflow current through the device
when it is powered down.
2. Features and benefits
Wide supply voltage range from 1.65 V to 5.5 V
High noise immunity
Complies with JEDEC standard:
JESD8-7 (1.65 V to 1.95 V)
JESD8-5 (2.3 V to 2.7 V)
JESD8-B/JESD36 (2.7 V to 3.6 V).
24 mA output drive (VCC = 3.0 V)
CMOS low power consumption
Latch-up performance exceeds 250 mA
Direct interface with TTL levels
Unlimited rise and fall times
Input accepts voltages up to 5 V
Multiple package options
ESD protection:
HBM JESD22-A114F exceeds 2000 V
MM JESD22-A115-A exceeds 200 V.
Specified from 40 C to +85 C and 40 C to +125 C.
3. Applications
Wave and pulse shaper
Astable multivibrator
Monostable multivibrator
1 page NXP Semiconductors
74LVC1G14
Single Schmitt-trigger inverter
11. Static characteristics
Table 7. Static characteristics
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
Symbol Parameter Conditions
40 C to +85 C
Min Typ[1] Max
VOH
HIGH-level
VI = VT+ or VT
output voltage IO = 100 A;
VCC = 1.65 V to 5.5 V
IO = 4 mA; VCC = 1.65 V
IO = 8 mA; VCC = 2.3 V
IO = 12 mA; VCC = 2.7 V
IO = 24 mA; VCC = 3.0 V
IO = 32 mA; VCC = 4.5 V
VOL
LOW-level
VI = VT+ or VT
output voltage IO = 100 A;
VCC = 1.65 V to 5.5 V
IO = 4 mA; VCC = 1.65 V
IO = 8 mA; VCC = 2.3 V
IO = 12 mA; VCC = 2.7 V
IO = 24 mA; VCC = 3.0 V
IO = 32 mA; VCC = 4.5 V
II input leakage VI = 5.5 V or GND;
current
VCC = 0 V to 5.5 V
IOFF power-off
leakage
current
VI or VO = 5.5 V; VCC = 0 V
VCC 0.1 -
1.2 1.54
1.9 2.15
2.2 2.50
2.3 2.62
3.8 4.11
-
-
-
-
-
-
- - 0.10
- 0.07 0.45
- 0.12 0.30
- 0.17 0.40
- 0.33 0.55
- 0.39 0.55
- 0.1 5
- 0.1 10
ICC
ICC
CI
supply current
additional
supply current
input
capacitance
VI = 5.5 V or GND; IO = 0 A;
VCC = 1.65 V to 5.5 V
VI = VCC 0.6 V; IO = 0 A;
VCC = 2.3 V to 5.5 V
VCC = 3.3 V; VI = GND to VCC
- 0.1 10
- 5 500
- 5.0 -
40 C to +125 C Unit
Min Max
VCC 0.1 - V
0.95 - V
1.7 - V
1.9 - V
2.0 - V
3.4 - V
- 0.10 V
- 0.70 V
- 0.45 V
- 0.60 V
- 0.80 V
- 0.80 V
- 100 A
- 200 A
- 200 A
- 5000 A
- - pF
[1] All typical values are measured at maximum VCC and Tamb = 25 C.
Table 8. Transfer characteristics
Voltages are referenced to GND (ground = 0 V); for load circuit see Figure 9.
Symbol Parameter
Conditions
40 C to +85 C
Min Typ[1] Max
VT+ positive-going see Figure 10 and Figure 11
threshold voltage
VCC = 1.8 V
VCC = 2.3 V
VCC = 3.0 V
VCC = 4.5 V
VCC = 5.5 V
0.82 1.0 1.14
1.03 1.2 1.40
1.29 1.5 1.71
1.84 2.1 2.36
2.19 2.5 2.79
40 C to +125 C Unit
Min Max
0.79 1.14 V
1.00 1.40 V
1.26 1.71 V
1.81 2.36 V
2.16 2.79 V
74LVC1G14
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 13 — 15 March 2016
© NXP Semiconductors N.V. 2016. All rights reserved.
5 of 21
5 Page NXP Semiconductors
74LVC1G14
Single Schmitt-trigger inverter
16. Package outline
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74LVC1G14
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 13 — 15 March 2016
© NXP Semiconductors N.V. 2016. All rights reserved.
11 of 21
11 Page |
Páginas | Total 21 Páginas | |
PDF Descargar | [ Datasheet 74LVC1G14.PDF ] |
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