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部品番号 AT32UC3A4256S
部品説明 32-bit AVR Microcontroller
メーカ ATMEL
ロゴ ATMEL ロゴ 
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AT32UC3A4256S Datasheet, AT32UC3A4256S PDF,ピン配置, 機能
Features
High Performance, Low Power 32-bit Atmel® AVR® Microcontroller
– Compact Single-Cycle RISC Instruction Set Including DSP Instruction Set
– Read-Modify-Write Instructions and Atomic Bit Manipulation
– Performing up to 1.51DMIPS/MHz
• Up to 126 DMIPS Running at 84MHz from Flash (1 Wait-State)
• Up to 63 DMIPS Running at 42MHz from Flash (0 Wait-State)
– Memory Protection Unit
Multi-Layer Bus System
– High-Performance Data Transfers on Separate Buses for Increased Performance
– 8 Peripheral DMA Channels (PDCA) Improves Speed for Peripheral
Communication
– 4 generic DMA Channels for High Bandwidth Data Paths
Internal High-Speed Flash
– 256KBytes, 128KBytes, 64KBytes versions
– Single-Cycle Flash Access up to 36MHz
– Prefetch Buffer Optimizing Instruction Execution at Maximum Speed
– 4 ms Page Programming Time and 8ms Full-Chip Erase Time
– 100,000 Write Cycles, 15-year Data Retention Capability
– Flash Security Locks and User Defined Configuration Area
Internal High-Speed SRAM
– 64KBytes Single-Cycle Access at Full Speed, Connected to CPU Local Bus
– 64KBytes (2x32KBytes with independent access) on the Multi-Layer Bus System
Interrupt Controller
– Autovectored Low Latency Interrupt Service with Programmable Priority
System Functions
– Power and Clock Manager Including Internal RC Clock and One 32KHz Oscillator
– Two Multipurpose Oscillators and Two Phase-Lock-Loop (PLL),
– Watchdog Timer, Real-Time Clock Timer
External Memories
– Support SDRAM, SRAM, NandFlash (1-bit and 4-bit ECC), Compact Flash
– Up to 66 MHz
External Storage device support
– MultiMediaCard (MMC V4.3), Secure-Digital (SD V2.0), SDIO V1.1
– CE-ATA V1.1, FastSD, SmartMedia, Compact Flash
– Memory Stick: Standard Format V1.40, PRO Format V1.00, Micro
– IDE Interface
One Advanced Encryption System (AES) for AT32UC3A3256S, AT32UC3A3128S,
AT32UC3A364S, AT32UC3A4256S, AT32UC3A4128S and AT32UC3A364S
– 256-, 192-, 128-bit Key Algorithm, Compliant with FIPS PUB 197 Specifications
– Buffer Encryption/Decryption Capabilities
Universal Serial Bus (USB)
– High-Speed USB 2.0 (480Mbit/s) Device and Embedded Host
– Flexible End-Point Configuration and Management with Dedicated DMA Channels
– On-Chip Transceivers Including Pull-Ups
One 8-channel 10-bit Analog-To-Digital Converter, multiplexed with Digital IOs.
Two Three-Channel 16-bit Timer/Counter (TC)
Four Universal Synchronous/Asynchronous Receiver/Transmitters (USART)
– Fractionnal Baudrate Generator
32-bit AVR
Microcontroller
AT32UC3A3256S
AT32UC3A3256
AT32UC3A3128S
AT32UC3A3128
AT32UC3A364S
AT32UC3A364
AT32UC3A4256S
AT32UC3A4256
AT32UC3A4128S
AT32UC3A4128
AT32UC3A464S
AT32UC3A464
32072H-AVR32–10/2012

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AT32UC3A4256S pdf, 電子部品, 半導体, ピン配列
AT32UC3A3
1. Description
The AT32UC3A3/A4 is a complete System-On-Chip microcontroller based on the AVR32 UC
RISC processor running at frequencies up to 84MHz. AVR32 UC is a high-performance 32-bit
RISC microprocessor core, designed for cost-sensitive embedded applications, with particular
emphasis on low power consumption, high code density and high performance.
The processor implements a Memory Protection Unit (MPU) and a fast and flexible interrupt con-
troller for supporting modern operating systems and real-time operating systems. Higher
computation capabilities are achievable using a rich set of DSP instructions.
The AT32UC3A3/A4 incorporates on-chip Flash and SRAM memories for secure and fast
access. 64 KBytes of SRAM are directly coupled to the AVR32 UC for performances optimiza-
tion. Two blocks of 32 Kbytes SRAM are independently attached to the High Speed Bus Matrix,
allowing real ping-pong management.
The Peripheral Direct Memory Access Controller (PDCA) enables data transfers between
peripherals and memories without processor involvement. The PDCA drastically reduces pro-
cessing overhead when transferring continuous and large data streams.
The Power Manager improves design flexibility and security: the on-chip Brown-Out Detector
monitors the power supply, the CPU runs from the on-chip RC oscillator or from one of external
oscillator sources, a Real-Time Clock and its associated timer keeps track of the time.
The device includes two sets of three identical 16-bit Timer/Counter (TC) channels. Each chan-
nel can be independently programmed to perform frequency measurement, event counting,
interval measurement, pulse generation, delay timing and pulse width modulation. 16-bit chan-
nels are combined to operate as 32-bit channels.
The AT32UC3A3/A4 also features many communication interfaces for communication intensive
applications like UART, SPI or TWI. The USART supports different communication modes, like
SPI Mode and LIN Mode. Additionally, a flexible Synchronous Serial Controller (SSC) is avail-
able. The SSC provides easy access to serial communication protocols and audio standards like
I2S.
The AT32UC3A3/A4 includes a powerfull External Bus Interface to interface all standard mem-
ory device like SRAM, SDRAM, NAND Flash or parallel interfaces like LCD Module.
The peripheral set includes a High Speed MCI for SDIO/SD/MMC and a hardware encryption
module based on AES algorithm.
The device embeds a 10-bit ADC and a Digital Audio bistream DAC.
The Direct Memory Access controller (DMACA) allows high bandwidth data flows between high
speed peripherals (USB, External Memories, MMC, SDIO, ...) and through high speed internal
features (AES, internal memories).
The High-Speed (480MBit/s) USB 2.0 Device and Host interface supports several USB Classes
at the same time thanks to the rich Endpoint configuration. The Embedded Host interface allows
device like a USB Flash disk or a USB printer to be directly connected to the processor. This
periphal has its own dedicated DMA and is perfect for Mass Storage application.
AT32UC3A3/A4 integrates a class 2+ Nexus 2.0 On-Chip Debug (OCD) System, with non-intru-
sive real-time trace, full-speed read/write memory access in addition to basic runtime control.
32072H–AVR32–10/2012
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