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部品番号 ASM3P2180A
部品説明 Peak Reducing EMI Solution
メーカ Alliance Semiconductor Corporation
ロゴ Alliance Semiconductor Corporation ロゴ 
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ASM3P2180A Datasheet, ASM3P2180A PDF,ピン配置, 機能
September 2004
ASM3P2180A
rev 1.0
www.DataSheet4U.com
Peak Reducing EMI Solution
Features
Generates an EMI optimized clocking
signal at the output.
Selectable output frequency range.
Single 1.25% or 2.4% down spread
output.
Integrated loop filter components.
Operates with a 3.3V supply.
Low-power CMOS design.
Available in 8-pin SOIC and 8-pin
TSSOP packages.
Product Description
The ASM3P2180A is a versatile Spread
Spectrum frequency modulator designed
specifically for a wide range of clock
frequencies. The ASM3P2180A reduces
electromagnetic interference (EMI) at the clock
source, allowing system wide reduction of EMI
of down stream clock and data dependent
signals. The ASM3P2180A allows significant
system cost savings by reducing the number of
circuit board layers and shielding that are
traditionally required to pass EMI regulations.
The ASM3P2180A modulates the output of a
single PLL in order to “spread” the bandwidth of
a synthesized clock, thereby decreasing the
peak amplitudes of its harmonics. This results in
significantly lower system EMI compared to the
typical narrow band signal produced by
oscillators and most clock generators. Lowering
EMI by increasing a signal’s bandwidth is called
spread spectrum clock generation.
The ASM3P2180A uses the most efficient and
optimized modulation profile approved by the
FCC and is implemented by using a proprietary
all-digital method.
Applications
The ASM3P2180A is targeted towards notebook
LCD displays, other displays using an LVDS
interface, PC peripheral devices and embedded
systems.
Key Specifications
Description
Supply voltages
Frequency
range
FS1=0
FS1=1
Cycle-to-cycle jitter
Selectable spread percentage
Output duty cycle
Output rise and fall time
Specification
VDD = 3.3V ± 5%
6 MHz Fin 10 MHz
18 MHz Fin 30 MHz
325 pS (max)
-1.25% or –2.4%
45/55% (worst case)
5ns (maximum)
Simplified Block Diagram
3.3V
X1
X2
ASM3P2180A
Spread spectrum output
(EMI suppressed)
Alliance Semiconductor
2595, Augustine Drive Santa Clara CA 95054 Tel 408 855 4900 Fax 408 855 4999 www.alsc.com
Notice: The information in this document is subject to change without notice.

--------------------------------------------
ASM3P2180A pdf, 電子部品, 半導体, ピン配列
September 2004
ASM3P2180A
wwwr.eDavta1S.h0eet4U.com
Absolute Maximum Ratings
Symbol
Parameter
Rating
Unit
VDD, VIN
Voltage on any pin with respect to GND
-0.5 to + 7.0
V
TSTG
Storage temperature
-65 to +125
°C
TA Operating temperature
0 to 70
°C
Note: These are stress ratings only and functional operation is not implied. Exposure to absolute
maximum ratings for extended periods may affect device reliability.
DC Electrical Characteristics
Symbol
VIL
VIH
IIL
IIH
IXOL
IXOH
VOL
VOH
ICC
IDD
VDD
tON
ZOUT
Parameter
Input low voltage
Input high voltage
Input low current (pull-up resistors on inputs SS%,
FS1)
Input high current
XOUT output low current (@ 0.4V, VDD = 3.3V)
XOUT output high current (@2.5V, VDD = 3.3V)
Output low voltage (VDD = 3.3V, IOL = 4mA)
Output high voltage (VDD = 3.3V, IOH = 4mA)
Dynamic supply current normal mode
(3.3V and 10pF loading)
Static supply current standby mode
Operating voltage
Power up time
(first locked clock cycle after power up)
Clock output impedance
Min
GND – 0.3
2.0
-
-
-
-
-
2.5
8
-
2.8
-
-
Typ Max Unit
- 0.8 V
- VDD + 0.3 V
- -27 µA
- 18 µA
3 - mA
4 - mA
- 0.4 V
- -V
21 35 mA
0.8 - µA
3.3 3.7 V
0.18
- mS
50 -
AC Electrical Characteristics
Symbol
Parameter
CLKIN
Input frequency
CLKOUT
Output frequency
tLH* Output rise time (measured at 0.8V to 2.0V)
tHL* Output fall time (measured at 2.0V to 0.8V)
tJC Jitter (cycle to cycle)
tD Output duty cycle
*tLH and tHL are measured into a capacitive load of 15pF
Min Typ Max Unit
6 - 30 MHz
6 - 30 MHz
1.2 1.3 1.4 nS
0.8 0.9 1.0 nS
- - 325 pS
45 50 55 %
Peak Reducing EMI Solution
Notice: The information in this document is subject to change without notice.
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