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データシート CR6842 PDF ( 特性, スペック, ピン接続図 )

部品番号 CR6842
部品説明 Green Power PWM Controller
メーカ Chip Rail
ロゴ Chip Rail ロゴ 
プレビュー
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CR6842 Datasheet, CR6842 PDF,ピン配置, 機能
CR6842
Green-Power PWM Controller with Freq. Jittering
Features
z Low Cost, Green-Power Burst-Mode PWM
z Very Low Start-up Current ( about 7.5µA)
z Low Operating Current ( about 3.0mA)
www.DataSheet4U.zcom Current Mode Operation
z Under Voltage Lockout (UVLO)
z VDD Over Voltage Protection(OVP)
z programmable over-temperature protection
z Internal Latch Circuit(OTP,OVP)
z Built-in soft start with 1ms
z Built-in Frequency jitter for better EMI Signature
z Soft Clamped gate output voltage 16.5V
z VDD over voltage protect 25.5V
z Cycle-by-cycle current limiting
z Sense Fault Protection
z Output SCP (Short circuit Protection)
z Built-in Synchronized Slope Compensation
z Leading-edge blanking on Sense input
z Programmable PWM Frequency
z High-Voltage CMOS Process with ESD
z DIP-8 & SOP-8 Pb-Free Package
z Compatible with SG6842J&LD7552&OB2269
Applications
z Power Adaptor
z Battery Charger Adapter
z Open Frame Switching Power Supply
z LCD Monitor
General Description
The CR6842 is a low startup current , low cost, current
mode PWM controller with Green-Power & burst-mode
power-saving operation. The integrated functions such as
the leading-edge blanking of the current sensing, internal
slope compensation provide the users a high efficiency,
low external component counts, and low cost solution for
AC/DC power applications. The special Green-Power
function provides off-time modulation to linearly decrease
the switching frequency under light-load conditions. And
under zero-load conditions, the power supply enters
burst-mode to further reduce power consumption by
shutting off PWM output. When the output of power
supply is short or over loaded, the FB voltage will
increase ,and if the FB voltage is higher than 5.2V for
longer than 56msec the PWM output will be turned off. A
external NTC resistor connected from pin RT to ground
can be applied to over-temperature protection. Pulse by
pulse current limit ensures a constant output current even
under short circuit. PWM output will be disabled as long
as VDD exceeds a threshold. When internal latch circuit is
used to latch-off the controller, the latch will be reset when
the power supply VDD is disabled.
Dec.2006 V 1.3
Chengdu Chip-Rail Tech.Co.,Ltd
1

1 Page



CR6842 pdf, ピン配列
CR6842
Block Diagram
VIN
0.9V
RI
Current
Reference
Soft
Driver
VDD
GATE
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RT
OTP
PWM
LATCH
Internal
BIAS
OSC
S
R
VDD
UVLO
OVP
Burst Mode
Controller
Green Mode
Controller
56ms
Debounce
5.2V
GND
Blanking
Circuit
SENSE
Slope Compensation
FB
Absolute Maximum Ratings
Symbol
VDD
VFB
VSense
PD
TL
TSTG
Parameter
Supply voltage Pin Voltage
Input Voltage to FB Pin
Input Voltage to SENSE Pin
Power Dissipation
ESD Capability, HBM Model
ESD Capability, Machine Model
Lead Temperature(Soldering)
Storage Temperature Range
DIP-8 10sec
SOP-8 10sec
Rating
40
-0.3 to 6V
-0.3 to 6V
1000
2000
200
260
230
-55 to + 150
Unit
V
V
V
mW
V
V
Dec.2006 V 1.3
Chengdu Chip-Rail Tech.Co.,Ltd
3


3Pages


CR6842 電子部品, 半導体
CR6842
hysteresis window ensures that the hold-up capacitor can adequately supply VDD during start-up.
Gate Output / Soft Driving
The CR6842 output stage is a fast totem pole gate driver. Cross-conduction has been avoided to
minimize heat dissipation, increase efficiency, and enhance reliability. The output driver is clamped by an
internal 18V Zener diode in order to protect the power MOSFET transistors from any harmful over-voltage
gate signals. A soft driving waveform is implemented to minimize EMI.
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Slope Compensation
The sensed voltage across the current sense resistor is used for peak-current-mode control and
cycle-by-cycle current limiting. The built-in slope compensation function improves power supply stability
and prevents peak-current-mode control from causing sub-harmonic oscillations. Within every switching
cycle, the CR6842 controller produces a positively sloped, synchronized ramp signal.
Constant Output Power Limit
When the SENSE voltage across the sense resistor RS reaches the threshold voltage, the output
GATE drive will be turned off following a small propagation delay TPD. This propagation delay will result in
an additional current proportional to TPD*VIN/LP. The propagation delay is nearly constant regardless of the
input line voltage VIN. Higher input line voltages will result in larger additional currents. Thus, under high
input-line voltages the output power limit will be higher than under low input-line voltages.
The output power limit variation can be significant over a wide range of AC input voltages. To
compensate for this, the threshold voltage is adjusted by the current IIN. Since the pin VIN is connected to
the rectified input line voltage through the start-up resistor, a higher line voltage will result in a higher
current IIN through the pin VIN.
The threshold voltage decreases if the current IIN increases. A small threshold voltage will force the
output GATE drive to terminate earlier, thus reducing total PWM turn-on time, and making the output power
equal to that of the low line input. This proprietary internal compensation feature ensures a constant output
power limit over a wide range of AC input voltages (90VAC to 264VAC).
VDD Over-voltage Protection
VDD over-voltage protection has been built in to prevent damage due to over voltage conditions.
When the voltage VDD exceeds the internal threshold due to abnormal conditions, PWM output will be
turned off. Over-voltage conditions are usually caused by open feedback loops.
Limited Power Control
The FB voltage will increase every time the output of the power supply is shorted or over-loaded. If the
FB voltage remains higher than a built-in threshold for longer than TLPS, PWM output will then be turned off.
As PWM output is turned off, the supply voltage VDD will also begin decreasing.
When VDD goes below the turn-off threshold (eg, 12.4V) the controller will be totally shut down. VDD
Dec.2006 V 1.3
Chengdu Chip-Rail Tech.Co.,Ltd
6

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